Monostable Multivibrator, Mods and Math

written on Sunday, July 5, 2015

In this small note I'll try to explain some aspects and mods of this standard well-known circuit, which, from my point of view, are not particularly well-described in the other sources.

Modifications to the Basic Circuit

While building and testing the basic analogue circuit, the following not-so-good things were spotted:

  • Output wave was not really square on both ends: the moment you add the 10uf capacitor and 1M potentiometer, it becomes very-very rounded
  • No reverse bias protection for the base-emitter junction of transistor Q2. Thus you can easily damage it (in theory). In practice, I have a working circuit (astable multivibrator), which actually works with -9v momentary reverse bias without any issues.

All of these issues are identical to the drawbacks of another classical circuit, astable multivibrator. Therefore the proposed solutions will be very similar. Here is my variant plus some explanations:

monostable circuit

  • Do not make R3 very big, 1M will already pose some problems. With big resistance, very small current enters the base of Q2, thus giving an opportunity to Q1 to open first, as much more current can enter its base. In addition, any fluctuation/noise of the power rail - for example, from DC motor - passed to the Q2 base can easily cut it off, therefore triggering the whole circuit mechanism. In general, there is a well-known principle: it is better to increase capacitance in order to increase a time constant, but not resistance (Actually, every high impedance circuits have the problem of picking up various stuff along the way :D)
  • The diode D1 provides the accurate square wave - rising edge - for the Output 1 (collector of Q1) by isolating the positive lead of capacitor C1 from the collector of Q1. Without it - like in classical circuit - voltage of a Q1 collector can not instantly jump from LOW to HIGH, because of a charging process of the capacitor, thus producing the characteristic curve. The moment Q1 is closed, diode D1 is reverse biased and therefore non-conducting, isolating and providing accurate rise edge at the Output 1.
  • Resistor R4 improves the falling edge of the 2nd output (collector of Q2), by physically robbing off the electrons out from the base of Q1 => speeding its "off" operation. Here it acts like a pull down resistor; without it, the waveform was is rather round with delays long enough - (7 seconds, for example).
  • Diode D2 protects base of Q2 from breakdown caused by a negative pulse by increasing the overall reverse voltage limit (= diode breakdown voltage + base-emitter reverse voltage limit)
  • Also, do not try to AC couple negative pulse directly to the base of Q2 without a clamping diode - it will not work, as the rising front of the pulse will turn on Q2 back. The reason is very simple: if you apply negative pulse directly to the base, the diode will prevent it from going to the negative of a cap, thus leaving it's potential unchanged; from the other side, for a short moment of time Q2 will be closed => base of Q1

be isolated from the negative lead of electrolytic during the pulse thus cap potential will stay unchanged will pass a positive change, but will clamp the negative change. - R5 and R6 resistors: when Q2 is closed and Output 2 is HIGH, the relation of R5 and R6 determine the output value as it is basically the voltage divider: R5 - R6 - Q1 base/emitter junction. In other words, if you want HIGH value of Output 2 be as close as possible to Vcc, you must lower R5 and increase R6.


Some why?-answers are required for the inputs:

  • For Input 1 diode+resistor clamping is necessary, otherwise the negative pulse will turn-off Q1 back: diode passes only positive changes to the base of Q1, while resistor dumps the negative change.
  • For Input 2 situation is practically the same, just a small reorganisation to provide negative pulse ("ground" Q2 base, thus close Q2).
  • Resistor values were taken arbitrarily, but tested: they should not be too big and too small, as mega-ohm range will be more like open-circuit, thus significantly slowing pull-up and pull-down actions.


Personally, I always wondered, why the charging time of the C1 is ln(2) * R * C. Actually, the answer is pretty simple and 2 comes from the following fact: when Q2-facing side of the capacitor C1 is driven negative relative to common wire, by a value usually equal to HIGH and becoming approximately equal -Vcc, therefore the real potential difference between this side and Vcc is doubled as a "distance" between -Vcc and Vcc is equal to 2 * Vcc and therefore, charging voltage is 2 x Vcc, producing this magic 2 in the math derivations.

Overall, math for monostable is very similar to Astable, as the "fire time" is dictated by the "astable" part of the circuit; for the further explanations, please read this.


Finally, here are the soldering schemes created using ASCii-pcB:

Top view:

      R R R  POT1 R
      1 2 3       5
    | o-o-o-------o->V|
    | # # #       # # |
    | # # &-------&-> |
    | # #/# ##### # # |
    | # & # o . o-&-< |
    | #/# #/#  /# # # |
    | o o o ##o## &-< |
    | | |     |  /# # |
D1  | o#+-@ : | o o-> |
    | |   |   | |"| # | C2
    | | o | +-@ o o >L| R6
    | | & | | #/# | | |
C1  | c & @#o & o-c | |
    | # &    /#   # | |
    | b-o---+ o---b | |
    | # #         # | |
    | e-o---------e-+ |
      Q R     D   Q
      1 4     2   2

To flip it vertically or horizontally please use the flip script from ASCii-pcB tool set.


Please, adapt provided material to your needs and use it :)

Have fun!


Categories: circuits and electronics

blog comments powered by Disqus